Diagram Notation

Douglas W. Coleman, University of Toledo

This page is intended only as a broad overview. The Boolean diagram notation of Hard Science Linguistics is presented in detail in Yngve (1996:246-274), chapters 19 and 20.
The same notation is capable of modeling cause-and-effect at two distinct system levels, the linkage and the communicating individual / participant.

The communicating individual and participant model those aspects of a single person relevant to that person’s ability to communicate (his/her linguistic properties). At this level, the communicating individual / participant is a dynamic system (plex) with various properties. Thus, any model of cause and effect within the communicating individual / participant must be compatible with what is known about human neurology and physiology.

The linkage models the entire assemblage of people and things involved in a communicative event. At this level, the communicating individual / participant is merely a component of a larger system. At the level of the linkage, any treatment of cause and effect must be compatible with what we know about the external physical world.

All cause and effect is modeled in terms of pulses and levels within a Boolean network. A pulse is a Boolean 1 transmitted through the network for a particular duration, which can be specified as delta-t1. A level is any Boolean 1 or 0 in the network that remains at its particular state until some event toggles it to the opposite state, where it will stay until another event toggles it back, and so on.

Boolean AND and OR gates are used in the conventional way.

andgate.JPG

AND Gate. The AND gate has two or more inputs on flat side and one output on the rounded side. Its orientation on the page does not affect how we read the input-output flow. When all inputs are Boolean 1 (”true”), there is a corresponding Boolean 1 output.

 

orgate.JPG

OR Gate. The OR gate has two or more inputs on the concave side and one output on the pointed side. As with the AND gate, its orientation on the page does not affect how we read the input-output flow. When one or more inputs are Boolean 1, there is a corresponding Boolean 1 output.

 

notwand.JPG

The use of an open circle to indicate a Boolean NOT also follows convention. In the case of the AND gate shown at left, there will be a Boolean 1 output on the right if and only if the lower input line is Boolean 1 and the upper input line (with the NOT circle) is Boolean 0 (”false”), since the NOT inverts the upper input line.

 

notgate.JPG

The INVERTER gate also is standard. The input is on the flat side, the output, on the pointed side with an open circle. While the input is Boolean 0, the output is Boolean 1. While the input is Boolean 1, the output is Boolean 0.  The INVERTER gate is also sometimes drawn as an AND gate with the small circle on one side.

 

expectation-procedure.jpg

Expectation procedures are indicated by a diagram such as that above.  The box at left is logically like an RS flip-flop, with the set line equivalent to the flip-flop’s S (set) input and the event line equivalent to its R (reset) input.  When something (some prior event or change in state of a condition) sends a Boolean 1 (true) pulse on set, this creates the expectation that event will occur; at that moment, expectation goes from Boolean level false to true.  When the expected event occurs, and a 1 (true) pulse arrives on event, expectation is reset to Boolean 0 (false) and a delayed true pulse (the delay indicated by Δt) is sent on del-exp.  (Note the use of a single-input AND gate for this purpose.)  Because this pulse is delayed, it is still briefly at Boolean true after expectation has fallen back to false.  Because of the inverter on the top input to the AND gate at the far right, during this brief period, the AND gate has two true inputs, and therefore passes the pulse on to next.

 

taskbox.JPG

Task procedures are indicated by means of boxes. Not all lines shown are used in all cases. Input is via a pulse, entering from the left. (Unlike the various gates, a task procedure does have a conventional orientation on the page, as shown.) Once the task procedure becomes active, the task active output line on the top goes to Boolean 1 (true) and stays at that level until the task procedure has completed. Also, a 1 (true) pulse goes out on the line Oi at the lower left. This pulse activates any subtasks. The last subtask in a sequence of subtasks sends a “done” feedback pulse (1 or true), which is received by the task procedure on the input on the lower right (I2). (If the task procedure is not active, a stray feedback pulse has no effect.) When the “done” feedback pulse is received by an active task procedure, its task active output line (on the top) goes back to Boolean 0-level (false), and a 1-level (true) output pulse is sent on the line at the right side (Of). This output line permits a task procedure to be linked with others in a temporal sequence.

 

taskprocedure.jpg

Task procedures can be thought of as functioning more or less like an expectation procedure with the addition of the initiate pulse which starts its subtasks.  In a sense, the completion of the subtasks fulfills the expectation created by the initiation of the task.

 

condproc.JPG

Selection procedures control task alternatives. In the case shown above, there is either a Boolean 1 level (input) on C1 or on C2 — C1 and C2 are mutually exclusive conditions. When a pulse arrives on i1, there will be a corresponding output pulse on O1 or O2, depending on whether C1 or C2, respectively, is at Boolean 1.

 

selection-procedure-internal.jpg

The internal logic of a typical selection procedure is very simple, as shown above.  A selection procedure may state more complex relationships among input conditions and outcomes, in which case, the text notation may be written within the border of the “black box” version seen earlier.

 

Yngve (1996:259-274) shows in some detail how the Boolean notation can be used to describe delay procedures, expectation procedures, task procedures, alternative subtasks, common (shared) subtasks, linear / forward-branching sequences of tasks, task hierarchies, and tasks processed in parallel.

Other diagram notational standards will be proposed as they suggest themselves.

Reference

Yngve, Victor H. 1996. From Grammar to Science: New foundations for general linguistics. Philadelphia: John Benjamins.

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